Title: Accurate and efficient simulation of PCB warpage during manufacturing processes using partitioned equivalent model

Reference: MR_115903

Dear Professor Jia,

We are pleased to let you know that the final version of your article “Accurate and efficient simulation of PCB warpage during manufacturing processes using partitioned equivalent model” is now available online, containing full bibliographic details. Are you ready to share it with the world?

To help you access and share this work, we have created a Share Link – a personalized URL providing 50 days' free access to your article. Anyone clicking on this link before October 31, 2025 will be taken directly to the final version of your article on ScienceDirect, which they are welcome to read or download. No sign up, registration or fees are required.

Your personalized Share Link:

https://authors.elsevier.com/a/1llk45%7EJAz7wU

We encourage you to use this Share Link to download a copy of the article for your own archive. The URL is also a quick and easy way to share your work with colleagues, co-authors and friends. And you are welcome to add the Share Link to your homepage or social media profiles, such as Facebook and Twitter.

Kind regards,

Elsevier Researcher Support

论文摘要如下：

During the complex manufacturing processes of printed circuit boards (PCBs), residual stresses inevitably accumulate, leading to warpage and stress concentration that can damage solder joints and interfaces, ultimately compromising the long-term reliability of electronic systems. To address these issues, this study proposes a partitioned equivalent model based on the multiscale finite element method, and comprehensively simulates the effects of lamination, etching and surface treatments (hot air solder leveling and solder mask coating) on PCB warpage. A key feature of this model is the integration of a post-processing strategy, which uses the correlation between copper content and coating thickness of the surface wiring layer to improve the prediction accuracy of PCB surface flatness and warpage. Additionally, the model incorporates specific boundary conditions for each wiring layer to more accurately calculate the equivalent material properties, under realistic manufacturing conditions. The multiscale simulation results are compared with the warpage and displacement curves obtained from both the shadow Moiré experiments and the finite element model with fully detailed wiring. The comparisons reveal a high level of agreement in warpage morphology, with the accuracy for warpage values of the partitioned equivalent model after surface treatments exceeding 75 %. Besides, this model shows significant advantages in computational efficiency, with simulation time reduced by up to 80 % compared to the fully detailed wiring model. Therefore, the proposed modeling approach can serve as an effective tool for optimizing PCB manufacturing processes, structural designs, and material selection, thereby enhancing the reliability and performance of electronic products.