我们课题组的研究论文《Warpage Prediction of Fan-out Wafer-Level Package Based on Coupled Deep Learning and Finite Element Simulation》在Microelectronics Reliability期刊上发表了。这是我们课题组最近两年在Microelectronics Reliability专业期刊上发表的第六篇电路结构可靠性研究论文。
Elsevier出版集团给出了50天期限的任何人都可以免费下载全文的链接：
We are pleased to let you know that the final version of your article Warpage prediction of fan-out wafer-level package based on coupled deep learning and finite element simulation is now available online, containing full bibliographic details. Are you ready to share it with the world?
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在上述研究成果的基础上，我们课题组针对集成电路产业的特点，创新性地发展了多模态AI技术，有效地解决了基于文本模型的材料性能参数和制造工艺参数、基于图像图形模型的电路布局布线的多模态特征融合问题，已经实现了面板级和晶圆级扇出封装的芯片尺寸及布局、关键材料性能参数、关键工艺参数协同影响封装体warpage的精确预测，在数秒内即可同时根据芯片尺寸及布局、关键材料性能参数和关键工艺参数精确地预测封装体warpage形貌和程度。在撰写论文中，相信很快就能见刊。
希望该技术能推动集成电路产业的发展，提升高端芯片的良率，加快上市进程，缓解我们的高端算力极度短缺的困窘局面。
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