[小资料] 1959年莱霍韦茨（Kurt Lehovec）申请的“电气隔离”多半导体组件专利（图片）
集成电路： integrated circuit
莱霍韦茨： Kurt Lehovec 1918-06-12 ~ 2012-02-17, 93
反向偏置p-n结： a reverse-biased p-n junction, a P-N junction biased in the reverse direction
p-n结隔离： p-n junction isolation
多半导体组件： Multiple semiconductor assembly
图1 莱霍韦茨 Kurt Lehovec 1918-06-12 ~ 2012-02-17, 93
Kurt Lehovec 87979443_133340687087.jpg
https://images.findagrave.com/photos/2012/92/87979443_133340687087.jpg?size=photos250
https://www.findagrave.com/memorial/87979443/kurt-lehovec#
一、1959年莱霍韦茨（Kurt Lehovec ）申请的“反向偏压P-N结”电气隔离专利《Multiple semiconductor assembly 多半导体组件》
莱霍韦茨 1959-04-22 申请，1962-04-10 授权的“反向偏压P-N结”电气隔离专利的美国专利“Multiple semiconductor assembly 多半导体组件”(U.S. Patent 3,029,366; Filed April 22, 1959)。
图片形式如下：
Patent Public Search Basic (PPUBS Basic)
https://ppubs.uspto.gov/pubwebapp/static/pages/ppubsbasic.html
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二、集成电路的其它相关专利：基尔比、诺伊斯、霍尔尼（平面工艺）
https://www.nutsvolts.com/magazine/article/the-birth-of-the-integrated-circuit
There seems to be no consensus on who invented the IC. In the 1960s, four people were thought to be responsible for it: Jack Kilby, Kurt Lehovec, Robert Noyce, and Jean Hoerni. In the ’70s, this list was shortened to Kilby and Noyce and then to Kilby. However, in the 2000s, historians and others reinstated the idea of multiple IC inventors.
【机器翻译】对于谁发明了集成电路，似乎没有达成共识。在20世纪60年代，有四个人被认为对此负有责任：杰克·基尔比、库尔特·莱霍韦茨、罗伯特·诺伊斯和让·霍尔尼。在70年代，这个名单被缩短为Kilby和Noyce，然后是Kilby。然而，在21世纪初，历史学家和其他人恢复了多个IC发明人的想法。
https://www.nutsvolts.com/magazine/article/the-birth-of-the-integrated-circuit
2.1 1959-02-06 基尔比 Kilby, 3,138,743, Miniaturized electronic circuits
https://ppubs.uspto.gov/pubwebapp/static/pages/ppubsbasic.html
Description
(1) 3,138,743
MINIATURIZED ELECTRONIC CIRCUITS
(2) Jack S. Kilby, Dallas, Tex., assignor to Texas Instruments Incorporated, Dallas, Tex., a corporation of Delaware Filed Feb. 6, 1959, Ser. No. 791,602 25 Claims. (Cl. 317-101) This invention relates to miniature electronic circuits, and more' particularly to unique integrated electronic circuits fabricated from semiconductor material.
(3) Many methods and techniques for miniaturizing electronic circuits have been proposed in the past. At first, most of the effort was spent upon reducing the size of the components and packing them more closely together.
2.2 1959-07-30 诺伊斯 Noyce, 2,981,877, Semiconductor device-and-lead structure
https://ppubs.uspto.gov/pubwebapp/static/pages/ppubsbasic.html
Description
(1) 2,981l,877 SEMI^dlCON\DUdCTOR®I DIEVICE-AN fD-L.E STRI8U CURE11 RIobrert N . Noyce, Lfos Altos, Calif., assignor to F'aircheild Semiconductor Corporation, M ountain View, C~aliff., a sorporation off Dlelaware lFiled Jufly 30, 1l959, Ser. NoT. 530,507 110O Claims, (Cl. 3fl7-235) This invention relates to electrical circuit structures incorporating semiconductor devices. Its principal objects are these: to provide improved device-and-lead structures for making electrical connections to the various semiconductor regions; to make unitary circuit structures more compact and more easily fabricated in small sizes than has heretofore been feasible; and to facilitate the inclusion of numerous semiconductor devices within a single body of material.
(2) In brief, the present invention utilizes dished junctions extending to the surface of a body of extrinsic semicon- ductor, an insulating surface layer consisting essentially of oxide of the same semiconductor extending across the junctions, and leads in the form of vacuum-deposited or otherwise formed metal strips extending over and adherent to the insulating oxide layer for making electrical connections to and between various regions of the semiconductor body without shorting the junctions.
2.3 1959-05-01 霍尔尼 Hoerni, 3,025,589, Method of manufacturing semiconductor devices
https://ppubs.uspto.gov/pubwebapp/static/pages/ppubsbasic.html
Description
(1) 3,025,589 M1E''TOD OFi MAN>U;FACTURIING SEMICONDU'gCTOR2 DEV ICES3 Jeana A. Hoerni, Los Altos, Calif., assignor, by mesnae assignmrsents, to FEairchi~ld Camnera anrd Instrumeant Cor- poratiion, Syosset, 1NT.Y., a corporation of )Delaware Filed MIay 1l, 1959, Ser. N!o. 810,388 11 Claimss. ( Cl. 29-25.3) The present invention relates to an improvement in the manufacture of semiconductor devices including transistors and to an improved transistor structure. More particularly, the invention relates, as to the method there- of, to the control of semiconductor diffusing and masking to the end of producing an improved diffusion transistor having fully protected junctions and maximized exposed surfaces for ohmic contact attachment.
(2) Advancements in transistor technology have in part been directed to the production of very small sized transistor structures, inasmuch as minute semiconductor geometries are required for high frequency applications of transistors. While the well known point-contact transistor is adapted for high frequency work, yet certain limitations attach to this type of transistor and consequently junction transistors have been developed for use in the high frequency range. One type of junction transistor which is particularly well adapted for high frequency applications is the double-diffused silicon transistor, and although the present invention is adapted for use with other types of transistors it is with respect to double- diffused silicon transistors that the following description is referenced.
(3) As regards the manufacture of double-diffused silicon transistors, and in fact any minute transistor structure, difficulty is encountered in providing a sufficient exposed area of the base material for attachment of an ohmic contact thereto. By maintaining the extremely small element dimensions required of the transistor, there results only a minute thickness of base material exposed between the base-collector junction and the emitter-base junction on a transistor surface. Conventional transistor utility requires the provision of electrical contacts to the individual transistor elements or portions, and thus it is necessary for the dimensions of the base portion to be made sufficient to attach such contacts. In certain instance
参考资料：
[1] Kurt Lehovec. Multiple semiconductor assembly [P]. U. S. Patent 3029366 (Filed April 22, 1959. Issued April 10, 1962).
https://ppubs.uspto.gov/pubwebapp/static/pages/ppubsbasic.html
[2] 汪波《芯片简史》，2023-11-11，从晶体管到集成电路：仙童半导体与德州仪器的争夺战
https://baijiahao.baidu.com/s?id=1782259232661644225
[3] 知乎，2020-08-06，芯片战争-54：仙童截胡钢铁巨人
https://zhuanlan.zhihu.com/p/122965436
[4] Nuts & Volts Magazine, 2021, The birth of the integrated circuit
https://www.nutsvolts.com/magazine/article/the-birth-of-the-integrated-circuit
[5] 1959: PRACTICAL MONOLITHIC INTEGRATED CIRCUIT CONCEPT PATENTED， ROBERT NOYCE BUILDS ON JEAN HOERNI'S PLANAR PROCESS TO PATENT A MONOLITHIC INTEGRATED CIRCUIT STRUCTURE THAT CAN BE MANUFACTURED IN HIGH VOLUME. Computer History Museum
CONTEMPORARY DOCUMENTS
Noyce, Robert N. "Semiconductor device-and-lead structure," U. S. Patent 2981877 (Filed July 30, 1959. Issued April 25, 1961).
Lehovec, Kurt. "Multiple Semiconductor Assembly" U. S. Patent 3029366 (Filed April 22, 1959. Issued April 10, 1962).
[6] 1958: ALL SEMICONDUCTOR "SOLID CIRCUIT" IS DEMONSTRATED. JACK KILBY PRODUCES A MICROCIRCUIT WITH BOTH ACTIVE AND PASSIVE COMPONENTS FABRICATED FROM SEMICONDUCTOR MATERIAL. Computer History Museum
https://www.computerhistory.org/siliconengine/all-semiconductor-solid-circuit-is-demonstrated/
[7] 1959: INVENTION OF THE "PLANAR" MANUFACTURING PROCESS. JEAN HOERNI DEVELOPS THE PLANAR PROCESS TO SOLVE RELIABILITY PROBLEMS OF THE MESA TRANSISTOR, THEREBY REVOLUTIONIZING SEMICONDUCTOR MANUFACTURING. Computer History Museum
https://www.computerhistory.org/siliconengine/invention-of-the-planar-manufacturing-process/
[8] TIMELINE, Computer History Museum
https://www.computerhistory.org/siliconengine/timeline/
相关链接：
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https://blog.sciencenet.cn/blog-107667-1468831.html
[2] 2023-08-27，[小资料] 1959年基尔比（Jack St. Clair Kilby）的集成电路专利（图片）
https://blog.sciencenet.cn/blog-107667-1400524.html
[3] 2023-10-27，[图片，小资料] 基尔比（Jack St. Clair Kilby）的第一个集成电路
https://blog.sciencenet.cn/blog-107667-1407513.html
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[5] 2023-10-29，[图片，小资料] 诺伊斯（Robert Norton Noyce）的第一个集成电路
https://blog.sciencenet.cn/blog-107667-1407690.html
[6] 2023-08-29，[小资料] 1959年霍尔尼（Jean Amedee Hoerni）的平面工艺专利（图片）
https://blog.sciencenet.cn/blog-107667-1400737.html
[7] 2023-11-15，[悲恸，绝望，崩溃] 创新，有时会气死人吗？（霍尔尼 Hoerni 的平面工艺 planar）
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