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[转载]【电子技术】【2013.08】自学习传感器研究:基于FPGA的ADC前端

已有 1035 次阅读 2020-10-15 18:23 |系统分类:科研笔记|文章来源:转载

本文为瑞典吕勒奥理工大学(作者:Joakim Nilsson)的硕士论文,共57页。

 

随着环境中传感器数量的不断增加,对传感器系统的功耗、数据压缩和成本提出了更高的要求。本论文以降低数据速率为主要目标,设计并评估一个适合于在其上运行高性能信号处理算法的基于FPGAADC前端。建立了一个前端的原型,并编写了演示软件,演示了它能够处理基于匹配追踪的算法可行性,该算法允许数据速率超过1MHz的信号稀疏表示。通过评估前端的噪声、功耗和速度,以及构建测试应用程序(FIR滤波器组)来完成评估,FIR滤波器组与匹配追踪的FPGA实现相关并进行比较。此外,对于本文所描述的系统,ASIC设计可能比FPGA设计更适合,因为与ASIC相比,FPGA具有更高的功耗、更低的速度和更高的单位成本。

 

With the amount of sensors in theenvironment ever increasing, high demands are being posed on today’s sensorsystems in terms of power consumption, data compression and cost. This thesispresents the work of constructing and evaluating an FPGA-based ADC front endsuitable for running demanding signal processing algorithms on it with datarate reduction as its primary goal. A prototype of the front end is built anddemonstration software is written demonstrating the feasibility of it beingable to handle a matching pursuit-based algorithm which allows for sparserepresentations of signals for data rates over 1 MHz. This assessment is doneby evaluating the front end in terms of noise, power consumption and speed andalso by the construction of a test application, an FIR filter bank which isrelated and compared to an FPGA implementation of matching pursuit. It is alsoconcluded that for the system described in this thesis, an ASIC design may bemore suitable than an FPGA design because of the higher power consumption,lower speed and higher per-unit-cost of FPGAs in comparison to ASICs.

 

1. 引言

2. 理论

3. 具体实施

4. 讨论

附录A ADC前端的详细设计

附录B VHDL源代码


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