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[转载]【电子技术】【2015.01】基于多FPGA的原型平台生成方法

已有 204 次阅读 2021-6-24 21:29 |系统分类:科研笔记|文章来源:转载

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本文为法国巴黎第六大学(作者:Qingshan TANG)的博士论文,共155页。

 

基于多FPGA的原型不再是硬件/软件集成的可选方案。我们可以将多FPGA原型平台分为三类:现成的、定制的和布线的(cabling)。现成的平台由一块通用多FPGA板组成,其中所有的FPGA间的连接都是固定的,并使用PCB走线实现。定制平台包括一个为特定设计定制构建的多FPGA板,其中所有FPGA间的连接也使用PCB走线实现。布线平台由多个现成的FPGA板组成,通过电缆和连接器连接。布线平台是半现成的,因为它由多块现成的电路板组成,它的FPGA之间连接以及到外部接口的连接都是用户定义的,并针对特定的设计进行定制。

 

基于多FPGA的原型设计存在以下三个问题:(1FPGA I/O正成为一种稀缺资源,导致FPGA间的带宽不断恶化。不幸的是,与FPGA内部网络延迟相比,多FPGA平台在FPGA内部通信中存在较大的时间延迟。因此,在合适的性能下进行SoC/ASIC的原型设计变得越来越困难。(2)由于性能要求、外部接口和成本等原因,70%的多FPGA原型平台都是自制的定制平台。然而,人工制作一个定制的多FPGA平台非常耗时。不同FPGA类型的电路板开发,虽然有助于工程师设计一个最佳的原型平台,但在短时间内是无法实现的。随着逻辑容量与FPGA I/O数之比呈指数级增长,设计高性能的定制多FPGA平台变得越来越具有挑战性。(3)布线平台得益于可用性和定制性。布线平台的性能取决于电缆的分布和外部接口的位置。然而,目前还没有一种工具能够自动为电缆分布和外部接口放置提供解决方案。由于引脚的限制,高性能电缆的布线变得越来越困难。与现成的平台相比,布线或定制平台在性能方面的附加值可能会因低效的电路板设计而严重受损。

 

本文的贡献是:(1)提出了一种新的路由算法,利用连接两个以上FPGA的多点走线来节省FPGAI/O,从而提高了性能。(2)提出了一种用于创建定制平台的自动设计流程,从而提高了生产效率,实现了单板开发,优化了成本和性能。(3)提出了一种由一块FPGA和多个连接器组成的布线平台,FPGA之间的连接以及与外部接口的连接只能通过连接或断开电缆实现,然后,提出了一种自动求解电缆分布的算法。(4)借助所开发的自动化工具,比较了在三种不同类型的多FPGA平台上实现的一组设计的性能,这些平台之间的性能是量化的。

 

Multi-FPGA based prototyping is no longeroptional for hardware/software integration. We can classify multi-FPGAprototyping platforms in three categories: off-the-shelf, custom and cabling.The off-the-shelf platform consists of a ready-made generic multi-FPGA board,where all the inter-FPGA connections are fixed and realized using PCB traces.The custom platform consists of a build-your-own multi-FPGA board tailored fora specific design, where all the inter-FPGA connections are realized using PCBtraces as well. The cabling platform consists of multiple ready-made FPGAboards connected by cables and connectors. The cabling platform is semioff-the-shelf due to that it consists of multiple ready-made boards, and semicustom due to that its connections inter FPGAs as well as connections toexternal interfaces are user-defined and tailored for a specific design. Thereare three existing problems regarding to multi-FPGA based prototyping: (1).FPGA I/Os are becoming a scarce resource, worsening the inter-FPGA bandwidthgeneration after generation. Unfortunately, multi-FPGA platforms suffer fromlarge timing delays in inter-FPGA communication compared to intra-FPGA netdelays. Therefore, it becomes more and more difficult to prototype an SoC/ASICdesign at proper performance. (2). 70% of multi-FPGA prototyping platforms arehome-made custom platforms due to performance requirement, external interfaces,and cost. Nevertheless, crafting a home-made custom multi-FPGA platform istoday a manual process, thus, time-consuming. The board exploration withdifferent FPGA types, which helps the engineers to design an optimumprototyping platform, can not be done. As the ratio between the logic capacityand the number of FPGA I/Os is increasing at an exponential rate, it becomesmore and more challenging to design a high-performance custom multi-FPGAplatform. (3). The cabling platform benefits from the availability and thecustomization. The performance of the cabling platform depends on thedistribution of the cables and the placement of the external interfaces.Nevertheless, there is no tool to automatically have a solution for the cabledistribution and external interface placement. A high-performance cablesdistribution becomes more and more difficult to be achieved due to the pinlimitation. Compared to the off-the-shelf platform, the added value, in termsof performance, of cabling or custom platforms can be heavily impaired by aninefficient board design. The contributions of the manuscript are: (1). A newrouting algorithm is proposed to spare FPGA I/Os by exploiting multi-point tracksthat connect more than two FPGAs, thus increasing the performance. (2). Anautomatic design flow for creating a custom platform is proposed, thusincreasing the productivity, enabling the board exploration, and optimizingcost and performance. (3). The cabling platform is proposed where one board iscomposed of one FPGA and several connectors. The connections between FPGAs aswell as the connections to external interfaces can be added or removed by onlyconnecting or disconnecting the cables (resp. daughter boards) with or from theconnectors. Then, an algorithm is proposed to automatically find a solution forthe cable distribution. (4). Thanks to the developed automatic tools, theachieved performances for a set of designs mapped on the three differentcategories of multi-FPGA platforms are compared. The performance gains betweenthese platforms are quantified.

 

1.  引言

2. 项目背景

3. 现成的多FPGA硬件平台

4. 定制的多FPGA硬件平台

5. 基于布线的多FPGA硬件平台

6. 不同平台的比较

7. 结论与展望


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